1. Field of the Invention
This invention relates to fabrication of precision etched, three dimensional mechanical or electromechanical structures from silicon wafers, and more particularly to a method using a two step silicon etching process for the etching of the frontside of a chemically masked silicon wafer, while concurrently preventing crack producing damage to the etch resistant masks on the backside of the wafer, so that unintentional backside etching does not occur through such backside cracks. Backside etching will reduce the yield of frontside etched silicon structures as in, for example, ink flow-directing channel plates of ink jet printheads. A concurrently filed application by the same inventors and assignee entitled "Fabricating Method for Silicon Structures" discloses a similar invention, but using only a one step silicon etching process.
2. Description of the Prior Art
In wafer etching applications where precision etching of the frontside of a silicon wafer is required to produce mechanical or electromechanical structures or devices, the yield of such devices is reduced by damage to the backside masking layer of the wafer, thus allowing unintentional backside etching. Backside etch defects can destroy yield of die, such as, for example, thermal ink jet channel plates. Additionally, backside etch defects can interfere with the vacuum handling equipment required to process wafers after etching.
Backside masking thin films can be quite delicate and subject to mechanical damage during the normal wafer handling required for processing. An example of a common etch masking layer is silicon nitride, which is chemical vapor deposited as a tensilely stressed film. While silicon nitride has generally excellent chemical etch resistance to a wide variety of useful etches, its tensile stress facilitates scratching and cracking, since a crack relieves internal tensile stress. This means that any mechanical contact of the backside coat of silicon nitride tends to form open cracks and scratches which result in backside etch defects.
U.S. Pat. No. 4,683,646 to Kando et al discloses a thermal printhead and method of manufacture therefor which provides reduced risk of damage during the separation of individual printheads from the plurality of printheads formed on a single substrate. Since the heating elements require both an oxidation resisting layer and a wear resistant film thereover, the electrode interface board and heating element containing section are manufactured separately and then electrically mated to eliminate the need to cover the electrode interface with the oxidation resisting layer and the wear resistant layer. The heating element portion of the thermal printer is patterned along the length of lands formed by anisotropic etching of parallel, flat bottomed grooves in a silicon wafer. Linear arrays of parallel heating elements are formed along each land with associated parallel metal electrodes connecting adjacent heating elements across the flat-bottomed grooves, so that the heating elements are center-raised. The electrodes connected to the heating elements from parallel stripes in the grooves between heating elements. A removable reinforcing film is deposited over the heating elements and electrodes. The opposite side of the silicon wafer is lapped or etched off to expose the underside of the electrodes in the grooves. The wafer is diced to produce individual linear arrays of heating elements and the reinforcing film is removed, prior to mating of the heating element array with an electrode interface board which provides contact pads for outside electrical input.
U.S. Pat. No. 4,585,513 to Gale et al discloses a method of removing the exposed portion of a glass support plate mounted within a stepped recess of a housing, the recess having an opening in the bottom thereof to expose the glass plate. A thin flat single crystalline silicon member is adhered to the side of the glass plate opposite the side confronting the recess opening. A backing plate is adhered to the surface of the silicon member having circuitry thereon and opposite to the surface bonded to the glass plate. A protective material is deposited over the backing plate and any portion of the silicon member not covered by the backing plate. The glass plate exposed through the recess opening in the housing is etched to remove all of the exposed glass plate, and exposing the silicon member.
U.S. Pat. No. 3,654,000 to Totah et al discloses a wafer of silicon material containing semiconductive devices on one side and an oxide coating on the other side. A first rigid support plate is temporarily adhered to the semiconductive devices and the surface of the wafer containing them. The opposite side of the wafer having the oxide coating is masked and aligned in conformity with the devices on the other side. The oxide coating is selectively etched and the mask is removed, leaving the oxide to serve as mask for etching through the silicon wafer. A second rigid support plate is temporarily adhered to the oxide and exposed silicon walls to maintain the individual die with semiconductive devices in the original matrix locations when the first support plate and adhering material is removed to expose the devices for testing prior to removal of the second support plate. The invention is to etch the silicon material containing the semiconductive devices instead of scribing lines and breaking the wafer into discrete devices.
U.S. Pat. No. 4,863,560 to Hawkins discloses fabrication of three dimensional silicon structures from (100) silicon wafers by a single side, multiple step ODE etching process. All etching masks are formed one on top of the other prior to the initiation of etching, with the coarsest mask formed last and used first. Once the coarse anisotropic etching is completed, the coarse mask is removed and the finer anisotropic etching is done. The preferred embodiment is described using a thermal ink jet channel plate as the three dimensional structure, where coarse etching step provides the reservoir and the fine etching step provides the ink channels.